AN ANALYTICAL PERFORMANCE-MODEL FOR MULTISTAGE INTERCONNECTION NETWORKS WITH FINITE, INFINITE AND ZERO LENGTH BUFFERS

Multistage Interconnection Networks (MINs) with crossbar switches have been used to interconnect processors and memory modules in parallel m ultiprocessor systems. They also play an increasingly important role i n the development of Asynchronous Transfer Mode (ATM) networks. In thi s paper we analyze the general case of MINs, made of k x k switches wi th finite, infinite or zero length buffers (unbuffered). The exact sol ution of the steady-state distribution of the first stage is derived f or all cases. We use this to get an approximation for the steady-state distributions in the second stage and beyond. In the case of unbuffer ed switches we reach the known exact solution for all the stages of th e MIN. Our results are validated by extensive simulations. (C) 1998 El sevier Science B.V. All rights reserved.