ADVANCED SALICIDES FOR 0.10 MU-M CMOS - CO SALICIDE PROCESSES WITH LOW DIODE LEAKAGE AND TI SALICIDE PROCESSES WITH DIRECT FORMATION OF LOW-RESISTIVITY C54 TISI2

The scaling of CMOS technologies to 0.10 mu m and beyond imposes incre asingly demanding constraints to self-aligned silicide (salicide) proc esses. For high performance devices, it is essential that salicide pro cesses achieve low gate and source-drain sheet resistance as well as l ow silicide to source-drain diffusion contact resistance, and maintain low junction leakage. This becomes increasingly difficult as junction depths and linewidths are scaled. In this paper we present an overvie w of the development of advanced Ti and Co salicide processes, with im plementations into a high performance 0.10 mu m complementary metal-ox ide-semiconductor (CMOS) technology. For Co salicide, the main scaling issue is diode leakage on shallow junctions. We show that the use of pre-amorphization implants or a pre-Co deposition sputter etch improve s diode leakage distributions, but fails to eliminate high leakage out liers. Co deposition temperature and rapid thermal processing (RTP) va riables were found to have a strong effect on diode leakage with optim ization of either one resulting in tight low leakage distributions on shallow junctions. For conventional Ti salicide processes, the main sc aling issue is sheet resistance on narrow lines due to incomplete high resistivity C49 TiSi2 to low resistivity C54 TiSi2 transformation. We present X-ray diffraction (XRD) and high resolution transmission elec tron microscopy (HRTEM) studies that indicate that direct growth of C5 4 TiSi2 bypassing the C49 phase is achieved at low temperatures on pol ycrystalline or amorphous Si with the addition of Mo impurities, elimi nating the narrow line effect. The mechanism is demonstrated to be nuc leation of MoSi2 and an unidentified phase at the Ti/Si interface, fol lowed by epitaxial growth of C54 TiSi2 on these templates. Ti salicide processes with Mo impurities were evaluated, demonstrating an optimiz ed one-step RTP process combining Mo and pre-amorphization implants th at maintains low sheet resistance to 0.06 mu m gate lengths. Successfu l implementations into a 0.10 mu m flow were achieved both for optimiz ed Co salicide or Ti salicide processes. (C) 1998 Elsevier Science S.A . All rights reserved.