SHARED-CACHE CLUSTERS IN A SYSTEM WITH A FULLY SHARED-MEMORY

Interest in the concept of clustered caches has been growing in recent years, The advantages of sharing data and instruction streams among t wo or more microprocessors are understood; however, clustering also in troduces new challenges in cache and memory coherency when system desi gn requirements indicate that two or more of these clusters are needed , This paper describes the shared L2 cache cluster design found in the S/390(R) G4 server. This novel cache design consists of multiple shar ed-cache clusters, each supporting up to three microprocessors, formin g a tightly coupled symmetric multiprocessor with fully coherent cache s and main memory, Because this cache provides the link between an exi sting S/390 system bus and the new, high-performance S/390 G4 micropro cessor chips, the paper addresses the challenges unique to operating s hared caches on a common system bus.