A HIGH-FREQUENCY CUSTOM CMOS S 390 MICROPROCESSOR/

Authors
Citation
Cf. Webb et Js. Liptay, A HIGH-FREQUENCY CUSTOM CMOS S 390 MICROPROCESSOR/, IBM journal of research and development, 41(4-5), 1997, pp. 463-473
Citations number
4
Categorie Soggetti
Computer Sciences","Computer Science Hardware & Architecture
ISSN journal
00188646
Volume
41
Issue
4-5
Year of publication
1997
Pages
463 - 473
Database
ISI
SICI code
0018-8646(1997)41:4-5<463:AHCCS3>2.0.ZU;2-3
Abstract
The S/390(R) Parallel Enterprise Server Generation 4 processor is an i mplementation of the IBM ESA/390(TM) architecture on a single custom C MOS chip. It was designed on a blank slate after consideration of rema pping either a prior CMOS design or a prior bipolar design. It uses a straightforward pipeline both to achieve a fast cycle time and to spee d the design cycle. The complex instructions are implemented using hig hly privileged subroutines called millicode. To achieve high data inte grity while maintaining a high clock frequency, the chip contains dupl icate I-and E-units which perform the same operations each cycle and h ave their results compared.