Kl. Shepard et al., DESIGN METHODOLOGY FOR THE S 390 PARALLEL ENTERPRISE SERVER G4 MICROPROCESSORS/, IBM journal of research and development, 41(4-5), 1997, pp. 515-547
This paper describes the design methodology employed in the design of
the S/390(R) Parallel Enterprise Server G4 microprocessors. Issues of
verifying design metrics of area, power, noise, timing, testability, a
nd functional correctness are discussed within the context of a transi
stor-level custom design approach, Practical issues of managing the co
mplexity of a 7.8-million-transistor design and encouraging design pro
ductivity are introduced.