Fabrication of gated nanosize Si-tip arrays for high perveance electron beam applications

Nanosize Si-tip arrays with Sated electrodes have been fabricated using the self-aligned method. In order to have a parallel electron beam (high perve ance beam) toward the anode plate, we have designed a nanosize tip array wi th heights of the tip slightly less than that of a gate electrode. A high p erveance beam is supposed to provide better focusing of the electron beams. Hence, it is important to have a high perveance electron beam for nanolith ographic application. The fabricated procedures for nanoscale Si-tip array are reactive ion etching, sharpening, and oxidation followed by a 7:1 BHF o xide etch. The metal gate fabrication procedures are performed with self-al igned techniques using plasma oxide deposition, metal sputter deposition, a nd photoresist spin coating. The self-aligned methods allow for a controlli ng gate aperture less than 1.0 mu m. The structure of the fabricated gated electron source was designed to have a 1.5 mu m gate aperture, a 1.5 mu m S iO2 insulating layer, and a 0.3 mu m Mo volcano-type gate electrode. The Fo wler-Nordheim and current-voltage characteristics of the fabricated tip arr ays after seasoning the tip in a high vacuum chamber (<5 x 10(-8) Torr) wer e examined carefully and its turn:on voltage was found to be similar to 25 V. The observed bright electron spots on the anode screen was measured to b e similar to 300 mu A. The total area for the (300 x 300) Si-tip array was similar to 1.5 mm(2). A charge coupled device camera photographed the brigh t area on the anode phosphor plate from electron bombardments and the size of electron bombardment spot was almost the same as the original tip array area (1.8 mm(2)). In addition, we have also fabricated the gated Si-tip arr ays with a focusing electrode for angular confinement of the electron beam emission and high perveance for the beam trajectory. (C) 1999 American Vacu um Society. [S0734-211X(99)05502-X].