Effect of 300 mm wafer transition and test processing logistics on VLSI manufacturing final test process efficiency and cost

Citation
A. Chikamura et al., Effect of 300 mm wafer transition and test processing logistics on VLSI manufacturing final test process efficiency and cost, IEICE TR EL, E82C(4), 1999, pp. 638-645
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEICE TRANSACTIONS ON ELECTRONICS
ISSN journal
09168524 → ACNP
Volume
E82C
Issue
4
Year of publication
1999
Pages
638 - 645
Database
ISI
SICI code
0916-8524(199904)E82C:4<638:EO3MWT>2.0.ZU;2-G
Abstract
The effect of lot size change and test processing logistics on VLSI manufac turing final test process efficiency and cost due to the transition of from conventional 5 or 6 inches to 300 mm (12 inches) in wafer size is evaluate d through simulation analysis. Simulated results show that a high test effi ciency and a low test cost are maintained regardless of arrival lot size in the range of the number of 300 mm wafers per lot from 1 to 25 arid the con tent of express lots in the range of up to 50% by using WEIGHT + RPM rule a nd the right final test processing logistics. WEIGHT + RPM rule is the rule that considers the jig and temperature exchanging time, the lot waiting ti me in queue and also the remaining processing time of the machine in use. T he logistics has a small processing and moving lot size equal to the batch size of testing equipment.