Effect of boron penetration on the stress induced leakage current in PMOS structures with p+ doped polysilicon gate

Boron penetration from a p+ polysilicon gate through a gate oxide and into the silicon substrate is a critical issue for the formation of the gate sta ck in the submicron complementary metal oxide semiconductor devices. Boron incorporation results in positive flat-band voltage (V-tb) shifts and p-typ e metal oxide semiconductor threshold voltage instabilities. In this work, we propose a method which allows comparison of degradation in oxide layers with different boron contents, and so with different flat-band voltages. It has been demonstrated that boron incorporation increases the stress induce d leakage current at an injected charge but also at breakdown. The charge t o breakdown is also affected by the boron diffusion in the oxide. The same trend is observed by increasing the stress current density. All these resul ts may be explained by an increase of the trap creation efficiency under st ress. Nevertheless, if the stress induced leakage current appears to be a m easure of a defect density in the oxide, the stress induced leakage current at breakdown does not correspond to a critical defect density needed for b reakdown. (C) 1999 Elsevier Science B.V. All rights reserved.