This paper presents for the first time, multiple layers of silicon-on-insul
ator (MLSOI) device islands fabricated using selective epitaxial growth (SE
G) and epitaxial lateral overgrowth (ELO) techniques. MLSOI has the potenti
al for ultra dense device integration, SOI device islands as small as 150 n
m x 150 nm, with thickness down to 40 nm have been fabricated, SOI device i
slands (5 mu m x 500 mu m) in the second layer have shown no stacking fault
s in the 1290 islands inspected, To demonstrate the device quality material
, fully depleted SOI (FD-SOI) P-MOSFET's were fabricated in the first layer
SOI islands with gate lengths down to less than 170 nm, Typically they had
low subthreshold leakage, below 0.2 pA/mu m, and a subthreshold swing of 7
6 mV/dec was measured.