Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth

Citation
S. Pae et al., Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth, IEEE ELEC D, 20(5), 1999, pp. 194-196
Citations number
11
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE ELECTRON DEVICE LETTERS
ISSN journal
07413106 → ACNP
Volume
20
Issue
5
Year of publication
1999
Pages
194 - 196
Database
ISI
SICI code
0741-3106(199905)20:5<194:MLOSIF>2.0.ZU;2-D
Abstract
This paper presents for the first time, multiple layers of silicon-on-insul ator (MLSOI) device islands fabricated using selective epitaxial growth (SE G) and epitaxial lateral overgrowth (ELO) techniques. MLSOI has the potenti al for ultra dense device integration, SOI device islands as small as 150 n m x 150 nm, with thickness down to 40 nm have been fabricated, SOI device i slands (5 mu m x 500 mu m) in the second layer have shown no stacking fault s in the 1290 islands inspected, To demonstrate the device quality material , fully depleted SOI (FD-SOI) P-MOSFET's were fabricated in the first layer SOI islands with gate lengths down to less than 170 nm, Typically they had low subthreshold leakage, below 0.2 pA/mu m, and a subthreshold swing of 7 6 mV/dec was measured.