The hybrid field-programmable architecture

Citation
A. Kaviani et S. Brown, The hybrid field-programmable architecture, IEEE DES T, 16(2), 1999, pp. 74-83
Citations number
14
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE DESIGN & TEST OF COMPUTERS
ISSN journal
07407475 → ACNP
Volume
16
Issue
2
Year of publication
1999
Pages
74 - 83
Database
ISI
SICI code
0740-7475(199904/06)16:2<74:THFA>2.0.ZU;2-R
Abstract
The authors propose a new architecture that combines two existing technolog ies: lookup-table-based FPGAs and complex programmable logic devices based on PLA-like blocks. Their mapping results indicate that on overage LUT-base d FPGAs require 78% more area than their hybrid FPGA, while providing rough ly the same circuit depth.