A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation

Authors
Citation
Jh. Lou et Jb. Kuo, A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation, IEEE CIR-II, 46(5), 1999, pp. 628-631
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
ISSN journal
10577130 → ACNP
Volume
46
Issue
5
Year of publication
1999
Pages
628 - 631
Database
ISI
SICI code
1057-7130(199905)46:5<628:A1CATB>2.0.ZU;2-R
Abstract
This paper presents a 1.5-V CMOS true-single-phase (TSP) bootstrapped dynam ic-logic (BDL) circuit using all-N-logic and bootstrapped circuit technique s for high-speed operation at a low supply voltage. As confirmed by the exp erimental results from the test chip implemented using a 0.8-mu m CMOS tech nology, the speed performance of this CMOS all-N-logic TSP BDL circuit with four serial inputs is 75% faster at a supply voltage of 1.5 V, as compared to the conventional TSP dynamic-logic circuit. Using an all-N-logic TSP BD L circuit, the maximum operating frequency of an implemented digital quadra ture modulator is 482 MHz at 5 V, and 68 MHz at 1.5 V, which is 27% faster compared to the circuit without using the BDL circuit.