Design and analysis of high performance current reference generators for low-power CMOS data converters

Authors
Citation
Js. Wang et Cl. Wey, Design and analysis of high performance current reference generators for low-power CMOS data converters, IEEE CIR-II, 46(5), 1999, pp. 647-652
Citations number
12
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
ISSN journal
10577130 → ACNP
Volume
46
Issue
5
Year of publication
1999
Pages
647 - 652
Database
ISI
SICI code
1057-7130(199905)46:5<647:DAAOHP>2.0.ZU;2-X
Abstract
Based on a highly accurate current divider using switched-current technique without the need of well-matched components, a current reference generator (CRG) circuit is developed to generate and hold the weighed currents used in the data converters. This paper also presents a methodology for designin g high-performance CMOS CRG circuits for low-power applications and their p erformance analysis for estimating the accuracy, speed, and power consumpti on. To demonstrate the design procedure and performance analysis, several d esign examples are given. The simulation results show that, for a 6-bit CRG circuit, its calibration time and holding time are 27 and 242 mu s, respec tively, and for a 8-bit CRG circuit, they are 48 and 236 mu s, respectively . The circuit consumes 1.8 mW and achieves better than 10-bit accuracy, whe re a MOSIS SCNA20 2-mu m process and a 3.3-V supply voltage are employed, T hus, the developed CRG circuit is well suited for low-power/low-voltage and moderate resolution data converters.