Electronic lifetime engineering using low-temperature GaAs in a quantum well structure

Citation
M. Stellmacher et al., Electronic lifetime engineering using low-temperature GaAs in a quantum well structure, J CRYST GR, 202, 1999, pp. 206-211
Citations number
14
Categorie Soggetti
Physical Chemistry/Chemical Physics
Journal title
JOURNAL OF CRYSTAL GROWTH
ISSN journal
00220248 → ACNP
Volume
202
Year of publication
1999
Pages
206 - 211
Database
ISI
SICI code
0022-0248(199905)202:<206:ELEULG>2.0.ZU;2-H
Abstract
Using an AlAs barrier, it is possible to confine the defects associated to the low temperature grown GaAs in a well-defined portion of the sample. We verified that a minimum thickness of about 5 nm of AlAs is required. Struct ures with good quality QW and LT-GaAs QW have been grown where the separati on between wells could be reduced to a minimum distance of 5 nm. This has b een used to design quantum heterostructures where the extension of the elec tronic wave functions of the different levels over the LT-GaAs regions can be adjusted independently. This controlled overlap opens an alternative way to engineer the lifetime of various electronic subbands. (C) 1999 Elsevier Science B.V. All rights reserved.