Lateral gettering of Fe on bulk and silicon-on-insulator wafers

Laterally displaced gettering sites have been studied as an alternative to traditional internal gettering and back-side gettering sites. Fe was diffus ed laterally and captured, first by coulombic pairing with B in p-type Si, and then by strategically placed ion implantation induced dislocation loops . This localization of Fe was tracked by both deep level transient spectros copy and capacitance-voltage measurements. As proof of the viability of the gettering technique, laterally displaced gettering sites were formed adjac ent to capacitors on various silicon-on-insulator (SOI) substrate types. Bo th implantation induced dislocation loops and P diffusion were used for get tering. An improvement in gate oxide integrity was observed for capacitors with lateral gettering on all SOI types studied. (C) 1999 The Electrochemic al Society. S0013-4651(98)07-110-9. All rights reserved.