MOSFET's negative transconductance at room temperature

Negative transconductance is reported for the first time at T = 300 K for N MOS transistors fabricated with different technologies and oxide thickness in the 3-20 nm range. The effects of drain bias, channel length, oxide thic kness as well as substrate doping and bias on the phenomenon are investigat ed. The results are interpreted in terms of surface-roughness limited mobil ity, and parameters for mobility modeling at high effective fields are extr acted.