The charge pump voltage booster is used in EEPROM and in other devices. Thi
s paper proposes a complementary charge pump voltage booster which is an im
provement of the ordinary booster. The proposed circuit and the conventiona
l charge pump voltage booster are compared by a simple analysis and an expe
riment using discrete elements. It is found that the proposed circuit can r
educe the charging time for the capacitive load. Also, the output voltage c
an be increased and the ripple voltage can be decreased for the resistive l
oad. A computer simulation is performed for the multistage voltage booster
using MOS diodes. Further, the proposed circuit is found to be better than
the conventional circuit in terms of the output voltage and the ripple volt
age. When the charge pump capacitance and the gate size of the MOSFET are h
alved, and the area occupied on the chip is considered, the output voltage
is kept the same and the ripple voltage is reduced. (C) 1999 Scripta Techni
ca, Electron Comm Jpn Pt 2, 82(6): 73-81, 1999.