Processing thick multilevel polyimide films for 3-D stacked memory

This paper discusses thick polyimide film processing for a three-dimensiona l (3-D) semiconductor chip-stacking application. The formation of a complex , multilevel via structure is demonstrated. The issues that arise in formin g these vias relate to apply, develop, profile modification, and integratio n. Apply issues include "outgassing" defects, edge-bead effects, as well as the planarity and leveling of both resist and polyimide over deep-via stru ctures, Develop issues pertain to the implementation of a thick resist proc ess that increases the structural integrity of the resist and controls its breakage, and to a vacuum bake before applying resist, which reduces solven t absorption into the resist. Profile modification issues include rounding via edges while minimizing bulk polyimide loss and maintaining image-size c ontrol. Developer attack of the metal pads during wet processing is discuss ed and a solution is proposed. Finally, additional process-integration issu es relating to polyimide-to-metal adhesion and composite stress levels of t he multilayer thick films are presented.