MULTIRATE VLSI ARRAYS AND THEIR SYNTHESIS

Many applications in signal and image processing can be efficiently im plemented on regular VLSI architectures such as systolic arrays. Multi rate arrays (MRAs) are an extension of systolic arrays where different data streams are propagated with different clocks. We address the ana lysis and synthesis problem for this class of architectures. We presen t a formal definition of MRAs, as systems of recurrence equations defi ned over sparse polyhedral domains. We also give transformation rules for this class of recurrences, and use them to show that MRAs constitu te a particular subset of systems of affine recurrence equations (SoAR Es). We then address the synthesis problem, and show how an MRA can be systematically derived from an initial specification in the form of a mathematical equation. The main transformations that we use are domai n rescalings and dependency decomposition, and we illustrate our metho d by deriving a hitherto unknown decimation filter array.