The rapid progress of bail grid array (BGA) component technology has served
to alleviate many problems associated with the placement and soldering of
high lead count, fine pitch surface mount technology (SMT) packages. An unf
ortunate result of this process, however. is the occurrence of voids in the
interconnecting eutectic solder balls of these packages. Large voids can a
ffect the mechanical and thermal properties of the interconnect, which can
reduce a component's mean time-to-failure and may also affect the transmiss
ion of high frequency electrical signals through the solder ball. For this
reason, several experiments were conducted to investigate the manner and me
chanisms in which voids are introduced into eutectic EGA solder ball joints
. The following process parameters were found to be the primary parameters
responsible for the voiding phenomenon: condition of the component's alloy
and substrate, oxygen concentration in the reflow atmosphere, solder paste
properties and the reflow profile. Through modification and optimization of
process parameters in the manufacturing environment, EGA solder joint void
ing was greatly reduced.