With the exponential increase in density and performance of programmable lo
gic, cores have become essential to further improve the time-to-market bene
fits for FPGAs. Hence, FPGA vendors are striving to implement the "ideal co
re" solution for system-on-a-chip on high-density FPGAs. Is the ideal core
"soft" or "hard" - the implications of both are discussed from the perspect
ive of an FPGA vendor.