A fully parallel vector-quantization processor for real-time motion-picture compression

A vector-quantization (VQ) processor system has been developed aiming at re al-time compression of motion pictures using a 0.6-mu m triple-metal CMOS t echnology. The chip employs a fully parallel single-instruction, multiple d ata architecture having a two-stage pipeline. Each pipeline segment consist s of 19 cycles, thus enabling the execution of a single VQ operation in onl y 19 clock cycles. As a result, it has become possible to encode a full-col or picture of 640 x 480 pixels in less than 33 ms, i.e,, the real-time comp ression of moling pictures has become available. The chip is scalable up to eight-chip master-slave configuration in conducting fully parallel search for 2-K template vectors. The chip operates at 17 MHz with a power dissipat ion of 0.29 W under a power-supply voltage of 3.3 V.