A 2.5-V BiCMOS comparator with current-mode interpolation

A high-speed latched comparator based on a current-mode architecture is pre sented. It achieves a sampling speed of 150 MS/s at 2.5-V supply, with a po wer consumption lower than conventional schemes. Its very low kickback nois e makes it especially suitable for differential analog-to-digital converter s (ADC's), Moreover, it supports precise 2X interpolation in current mode a t full clock speed, allowing a further reduction of the ADC power consumpti on. The comparator was implemented in a 0.8-mu m BiCMOS technology.