Path planning using hardware time delays

Authors
Moller, R
Citation
R. Moller, Path planning using hardware time delays, IEEE ROBOT, 15(3), 1999, pp. 588-592
Citations number
9
Categorie Soggetti
AI Robotics and Automatic Control
Journal title
IEEE TRANSACTIONS ON ROBOTICS AND AUTOMATION
ISSN journal
1042296X → ACNP
Volume
15
Issue
3
Year of publication
1999
Pages
588 - 592
Database
ISI
SICI code
1042-296X(199906)15:3<588:PPUHTD>2.0.ZU;2-G
Abstract
The computation of shortest paths as a basic task in robotics can be accomp lished by graph-searching algorithms, Attempts have been made to accelerate a part of these algorithms-the computation of potential vectors-using fine -grained parallel hardware. As shown in this paper, the complexity of digit al path-planning circuits can be enormously reduced, if distances are encod ed by hardware time delays.