Authors
Citation
G. Kiefer et Hj. Wunderlich, Deterministic BIST with multiple scan chains, J ELEC TEST, 14(1-2), 1999, pp. 85-93
Citations number
26
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS
ISSN journal
09238174
→ ACNP
Volume
14
Issue
1-2
Year of publication
1999
Pages
85 - 93
Database
ISI
SICI code
0923-8174(199902)14:1-2<85:DBWMSC>2.0.ZU;2-3
Abstract
A deterministic BIST scheme for circuits with multiple scan paths is presen
ted. A procedure is described for synthesizing a pattern generator which st
imulates all scan chains simultaneously and guarantees complete fault cover
age.
The new scheme may require less chip area than a classical LFSR-based appro
ach while better or even complete fault coverage is obtained at the same ti
me.