0.3-MU-M GATE-LENGTH ENHANCEMENT-MODE INALAS INGAAS/INP HIGH-ELECTRON-MOBILITY TRANSISTOR/

Citation
A. Mahajan et al., 0.3-MU-M GATE-LENGTH ENHANCEMENT-MODE INALAS INGAAS/INP HIGH-ELECTRON-MOBILITY TRANSISTOR/, IEEE electron device letters, 18(6), 1997, pp. 284-286
Citations number
9
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
07413106
Volume
18
Issue
6
Year of publication
1997
Pages
284 - 286
Database
ISI
SICI code
0741-3106(1997)18:6<284:0GEIIH>2.0.ZU;2-R
Abstract
The fabrication and performance of ultra-high-speed 0.3-mu m gate-leng th enhancement-mode high-electron-mobility transistors (E-HEMT's) are reported, By using a buried platinum-gate technology and incorporating an etch-stop layer in the heterostructure design, submicron E-HEMT de vices exhibiting both high-threshold voltages and excellent threshold- voltage uniformity have been achieved, The devices demonstrate a thres hold voltage of +171 mV with a standard deviation of only 9 mV. In add ition, a maximum DC extrinsic transconductance of 697 mS/mm is measure d at room temperature. The output conductance is 22 mS/mm, which resul ts in a maximum voltage gain (g(m)/g(0)) of 32. The devices show excel lent RF performance, with a unity current-gain cutoff frequency (f(t)) of 116 GHz and a maximum frequency of oscillation (f(max)) of 229 GHz . To the best of the authors' knowledge, these are the highest reporte d frequencies for lattice-matched E-HEMT's on M.