Failure estimation of semiconductor chip during wire bonding process

Wire bonding, a process of the connection between a semiconductor chip and a lead frame by a thin metal wire, is one of the important processes of ele ctronic packaging. This paper presents failure estimation of a silicon chip and ct GaAS chip during a gold wire bonding process. The gold wire bonding process is carried out by pressing a gold ball made at a tip of the gold w ire on a semiconductor chip and vibrating it by ultrasonic. High contact pr essure is useful for shortening the process cycle, but it sometimes causes failure of the semiconductor chip. Elastic-plastic large deformation contac t analyses are performed and the distributions of the stresses in these sem iconductor chips are investigated. The possibility of failure of a semicond uctor chip under usual wire bonding pressure is pointed out only for a GaAs chip.