Intermodulation distortion reduction with drain bias in parallel MESFET switch

Authors
Garcia, JA De la Fuente, ML Pedro, JC Mediavilla, A Tazon, A Garcia, JL
Citation
Ja. Garcia et al., Intermodulation distortion reduction with drain bias in parallel MESFET switch, ELECTR LETT, 35(11), 1999, pp. 907-909
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
35
Issue
11
Year of publication
1999
Pages
907 - 909
Database
ISI
SICI code
0013-5194(19990527)35:11<907:IDRWDB>2.0.ZU;2-X
Abstract
A relationship is described between the intermodulation distortion (IMD) pe rformance of a parallel MESFET switch to the device's experimentally extrac ted higher order derivatives. As the third-order I-ds(V-gs, V-ds) Taylor-se ries coefficients support a nonoptimum linearity in cold FET operation (V-D S = 0V), a small drain-to-source voltage 'sweet spot' has been found for IM D reduction, giving a useful bias point for highly linear switching applica tions without degrading attenuation.