250 mW 2.488 Gbit s and 622 Mbit s SONET SDH bit-error-monitoring LSI

Citation
K. Kawai et H. Ichino, 250 mW 2.488 Gbit s and 622 Mbit s SONET SDH bit-error-monitoring LSI, ELECTR LETT, 35(11), 1999, pp. 914-916
Citations number
3
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
35
Issue
11
Year of publication
1999
Pages
914 - 916
Database
ISI
SICI code
0013-5194(19990527)35:11<914:2M2GSA>2.0.ZU;2-9
Abstract
A bit-error-moniroring LSI for 2.488Gbit/s and 622Mbit/s SONET/SDH frames i s presented for transparent optical networks. A new architecture specific t o the monitoring LSI is adopted and low power bipolar LSI design techniques are used to achieve 250mW power consumption and a 9.6mm-square package.