Image processing chip for small object detection

A new, front-end image processing chip is presented for real-time small obj ect detection. It has been implemented using a 0.6 mu, 3.3V CMOS technology and operates on 10-bit input data at 54 megasamples per second. It occupie s an area of 12.9mm x 13.6mm(including pads), dissipates 1.5W, has 92 I/O p ins and is to be housed in a 160-pin ceramic quarter flat-pack. It performs both one- and two-dimensional FIR filtering and a multilayer perceptron (M LP) neural network function using a reconfigurable array of 21 multiplicati on-accumulation cells which corresponds to a window size of 7 x 3. The chip can cope with images of 2047 pixels per line and can be cascaded to cope w ith larger window sizes. The chip performs two billion fixed point multipli cations and additions per second.