The effect of develop time (DT) on process control of the sub-half-micron o
ptical lithography step of a production CMOS process is examined. It is sho
wn that develop times greater than those generally used increase the depth-
of-focus (DOF), exposure latitude (EL), linearity, exposure margin and resi
st sidewall angle, thereby improving the process capability. Results are gi
ven for both practical experiment and simulation using PROLITH/2. The simul
ation parameters used have been highly refined to give excellent correlatio
n with experiment over a wide range of conditions.