CMOS compatible alignment marks for the SCALPEL proof of lithography tool

Citation
Rc. Farrow et al., CMOS compatible alignment marks for the SCALPEL proof of lithography tool, MICROEL ENG, 46(1-4), 1999, pp. 263-266
Citations number
8
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONIC ENGINEERING
ISSN journal
01679317 → ACNP
Volume
46
Issue
1-4
Year of publication
1999
Pages
263 - 266
Database
ISI
SICI code
0167-9317(199905)46:1-4<263:CCAMFT>2.0.ZU;2-H
Abstract
SCALPEL alignment marks have been fabricated in a SiO2/WSi2 structure using SCALPEL lithography and plasma processing. The positions of the marks were detected through e-team resist in the SCALPEL proof of lithography (SPOL) tool by scanning the image of the corresponding mask mark over the wafer ma rk and detecting the backscattered electron signal. Single scans of line sp ace patterns yielded mark positions that were repeatable within 30 nm 3 sig ma with a dose of 0.4 mu C/cm(2) and signal-to-noise of 16 dB. An analysis shows that the measured repeatability is consistent with a random noise lim ited response. The mark detection repeatability limit, that can be attribut ed to SPOL machine factors, was measured to be 20 nm 30. By using a digital ly sequenced mark pattern, the capture range of the mark detection was incr eased to 13 mu m while maintaining 36 nm 30 precision. The SPOL machine mar k detection results are very promising considering that they were measured under electron optical conditions that were not optimized.