Parallel quaternary signed-digit arithmetic operations: addition, subtraction, multiplication and division

A quaternary signed-digit number representations-based arithmetic unit is p roposed. The arithmetic unit performs parallel one-step addition (subtracti on), multiplication and division. We use the symbolic substitution techniqu e to reduce the number of the computation rules involved in the computation rules. Fast parallel nonrecoded quaternary signed-digit multiplication is proposed using our proposed one-step quaternary signed-digit adder. Also, p arallel quaternary signed-digit division is performed in constant time by e xploiting an iterative conversion algorithm where in every iterative step a negation operation, an addition operation and two multiplication operation s are performed. The execution times of the proposed QSD operations are pro portional to log, n, where n are the length of operands. (C) 1998 Elsevier Science Ltd. All rights reserved.