A ULSI shallow trench isolation process through the integration of multilayered dielectric process and chemical-mechanical planarization

A multilayer thin film structure (SiO2/SiNx/SiO2) with a one-step chemical- mechanical polish (CMP) process is developed for shallow trench filling and planarization for ULSI devices in the quarter micron regime. By fine-tunin g the plasma-enhanced chemical vapor deposition (PECVD) conditions we succe ssfully modified the stoichiometry and other characteristics of the as-depo sited SiNx and oxide films. As these film characteristics are changed, the CMP removal rate selectivity between sacrificial oxide and nitride stopper layer can also be adjusted. Correspondingly, the CMP process latitude for s hallow trench isolation in 0.25 mu m memory devices can be broadened by seq uentially depositing multilayered oxide and nitride films with adjustable c haracteristics and CMP removal rates. Dishing-free wide trench areas with e xcellent planarity can be achieved through the integration of the proposed multilayered PECVD oxide/nitride scheme and the one-step CMP process. (C) 1 999 Elsevier Science S.A. All rights reserved.