Modeling study of ultrathin gate oxides using direct tunneling current andcapacitance-voltage measurements in MOS devices

Using both quantum mechanical calculations for the silicon substrate and a modified WKB approximation for the transmission probability, direct tunneli ng currents across ultra-thin gate oxides of MOS structures have been model ed for electrons from the inversion layers in p-tgpe Si substrates. The mod eled direct tunneling currents have been compared to experimental data obta ined from nMOSFET's with direct tunnel gate oxides, Excellent agreement bet ween the model and experimental data for gate oxides as thin as 1.5 nm has been achieved, Advanced capacitance-voltage techniques have been employed t o complement direct tunneling current modeling and measurements. With capac itance-voltage (C-V) techniques, direct tunneling currents can be used as a sensitive characterization technique for direct tunnel gate oxides. The ef fects of both silicon substrate doping concentration and polysilicon doping concentration on the direct tunneling current have also been studied as a function of applied gate voltage.