Design and evaluation of system-level checks for on-line control flow error detection

Citation
Z. Alkhalifa et al., Design and evaluation of system-level checks for on-line control flow error detection, IEEE PARALL, 10(6), 1999, pp. 627-641
Citations number
19
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
ISSN journal
10459219 → ACNP
Volume
10
Issue
6
Year of publication
1999
Pages
627 - 641
Database
ISI
SICI code
1045-9219(199906)10:6<627:DAEOSC>2.0.ZU;2-Y
Abstract
This paper evaluates the concurrent error detection capabilities of system- level checks, using fault and error injection. The checks comprise applicat ion and system level mechanisms to detect control flow errors. We propose E nhanced Control-Flow Checking Using Assertions (ECCA). In ECCA, branch-free intervals (BFI) in a given high or intermediate level program are identifi ed and the entry and exit points of the intervals are determined. BFIs are then grouped into blocks, the size of which is determined through a perform ance/overhead analysis. The blocks are then fortified with preinserted asse rtions. For the high level ECCA, we describe an implementation of ECCA thro ugh a preprocessor that will automatically insert the necessary assertions into the program. Then, we describe the intermediate implementation possibl e through modifications made on gee to make it ECCA capable. The fault dete ction capabilities of the checks are evaluated both analytically and experi mentally. Fault injection experiments are conducted using FERRARI [1] to de termine the fault coverage of the proposed techniques.