Study of Cu contamination during copper integration for subquarter micron technology

Citation
P. Motte et al., Study of Cu contamination during copper integration for subquarter micron technology, SOL ST ELEC, 43(6), 1999, pp. 1015-1018
Citations number
5
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Eletrical & Eletronics Engineeing
Journal title
SOLID-STATE ELECTRONICS
ISSN journal
00381101 → ACNP
Volume
43
Issue
6
Year of publication
1999
Pages
1015 - 1018
Database
ISI
SICI code
0038-1101(199906)43:6<1015:SOCCDC>2.0.ZU;2-5
Abstract
Copper contamination in several dielectric deposited on copper-CVD film was investigated, This study aims at integrating copper in a dual damascene st ructure interconnection for sub-quarter micron technology. A complete conta mination profile into the deposited dielectric was available using SIMS, TX RF (total X-ray reflection fluorescence) and LPD-AAS (liquid phase decompos ition-atomic absorption spectroscopy) as complementary characterization too ls. The Cu contamination profile of the SiN/SiO2 and SiO2? structure deposi ted on copper was given. The PECVD process used for both process cleaning o f the chamber and SiOF deposition imply plasma with fluorine and the reacti vity of this species with copper was shown to be critical for dielectric co ntamination and copper contact surface. Eventually, a cleaning solution was investigated to lower the contamination at the surface of the dielectric, the most contaminated parr. (C) 1999 Elsevier Science Ltd, All rights reser ved.