High breakdown voltage P-HEMT using single gate lithography and two-step gate recess process

In this paper, we report a two-step gate recess process that uses the singl e step gate patterning and the sequentially selective dry and wet etchings to improve the breakdown voltage of low noise P-HEMT device. The current-vo ltage (I-V) and gate-to-drain reverse diode characteristics of P-HEMT fabri cated by using two-step gate recess are compared with those by using the co nventional single gate recess. The high gate-to-drain breakdown voltage (-1 1.7 V), low output conductance (19 mS/mm), and low leakage current (0.4 mu A) in pinch-off region of I-V characteristics are obtained for the low nois e P-HEMT fabricated with two-step gate recess process.