A pixel readout chip for 10-30 MRad in standard 0.25 mu m CMOS

A radiation tolerant pixel detector readout chip has been developed in a co mmercial 0.25 mu m CMOS process. The chip is a matrix of two columns of 65 identical cells. Each readout cell comprises a preamplifier, a shaper filte r, a discriminator,a delay line and readout logic. The chip occupies 10 mm( 2), and contains about 50 000 transistors. Electronic Boise (similar to 220 e(-) rms) and threshold dispersion (similar to 160 e(-) rms) allow operati on at 1 500 e(-) average threshold. The radiation tolerance of this mixed m ode analog-digital circuit has been enhanced by designing NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The chi p, which was developed at CERN for the ALICE and LHCb experiments, was stil l operational after receiving 3.6 x 10(13) protons over an area of 2 mm x 2 mm. Other chips were irradiated with X-rays and remained fully functional up to 30 Mrad(SiO2) with only minor changes in analog parameters.,These res ults indicate that careful use of deep submicron CMOS technologies can lead to circuits with high radiation tolerance.