A basic component, called Polycell, has been developed for the ISGRI (INTEG
RAL Soft Gamma Ray Imager) CdTe camera on board the INTEGRAL (INTErnational
Gamma-Ray Astrophysics Laboratory) satellite. Operating at room temperatur
e, it covers the 20 keV - 1 MeV energy range. It features a sub-ensemble of
16 CdTe detectors and their associated front end electronics. This electro
nics is based on 4-channel analog-digital ASICs. Their analog part features
a low noise preamplifier, allowing a threshold below 20 keV and a pulse ri
se-time measurement which permits a charge loss correction. The digital par
t ensures the internal acquisition timing sequence as well as the dialogue
with external electronics. Two versions of the ISGRI: ASIC have been develo
ped in a collaboration of two CEA microelectronics teams from CEA/DTA/LETI/
DSYS and CEA/DSM/DAPNIA/SEI, respectively on a standard CMOS AMS process ha
rdened against radiation by lay-out, and on a Silicon On Insulator process
(DMILL MHS), the latter being latch-up free.
This paper presents the ASIC and polycell architecture as well as experimen
tal results obtained with polycells equipped with AMS ASICs.