On-line dead-time compensation technique for open-loop PWM-VSI drives

Citation
Ar. Munoz et Ta. Lipo, On-line dead-time compensation technique for open-loop PWM-VSI drives, IEEE POW E, 14(4), 1999, pp. 683-689
Citations number
15
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON POWER ELECTRONICS
ISSN journal
08858993 → ACNP
Volume
14
Issue
4
Year of publication
1999
Pages
683 - 689
Database
ISI
SICI code
0885-8993(199907)14:4<683:ODCTFO>2.0.ZU;2-L
Abstract
A new on-line dead-time compensation technique for low-cost open-loop pulse width modulation voltage-source inverter (PWM-VSI) drives is presented. Bec ause of the growing numbers of open-loop drives operating in the low-speed region, the synthesis of accurate output voltages has become an important i ssue where low-cost implementation plays an important role. The so-called a verage dead-time compensation techniques rely on tno basic parameters to co mpensate for this effect: the magnitude of the volt seconds lost during eac h PWM cycle and the direction of the current. In a low-cost implementation, it is impractical to attempt an on-line measurement of the volt-seconds er ror introduced in each cycle-instead an off-line measurement is favored, On the other hand, the detection of the current direction must be done on lin e. This becomes increasingly difficult at lower frequencies and around the zero crossings, leading to erroneous compensation and voltage distortion. T his paper presents a simple and cost-effective solution to this problem by using an instantaneous back calculation of the phase angle of the current. Given the closed-loop characteristic of the back calculation, the zero cros sing of the current is accurately obtained, thus allowing for a better dead -time compensation. Experimental results validating the proposed method are presented.