A 128-kbit SRAM (Static Random Access Memory) macro with the 0.35 mu m FD (
Fully-Depleted)-CMOS/SIMOX (Separation by Implantation of Oxygen) technolog
y has been developed to demonstrate the merits of that technology for the l
ow-voltage applications. Its access time at Vdd=1.5V was comparable with th
at obtained with the 0.35 mu m standard bulk CMOS technology at Vdd=3.3V, d
ue to the combination of the small S/D capacitance and the small back-bias
effect. As the yield of the 128-kbit SRAM: macros was almost the same as th
e standard bulk CMOS technology, the manufacturability of the 0.35 mu m FD-
CMOS/SIMOX technology has also been demonstrated.