Integrated electroless metallization for ULSI

In this paper, we present a novel copper interconnect scheme where conducti ng, barrier and capping layers are deposited by electroless methods. Electr oless copper deposition has been demonstrated for sub-0.25 mu m metallizati on on large silicon wafers. In this paper. we extend the use of electroless deposition for the layers under and above the copper. After a short overvi ew of electroless copper and barriers deposition we describe some of the cu rrent process modules and the properties of the thin films. Next we review the individual layer properties, describe their integration, and discuss th e highlights and problems of the integration of copper, barriers, and cappi ng layers, all deposited by electroless methods, The integrated process Fea tures deposition from an aqueous solution of copper and CoW alloys. The met als deposition is due to an electrochemical oxidation-reduction reaction th at takes place on the liquid-solid interface. Electroless deposition is aut ocatalytic and the interconnect materials themselves can serve as seeds for some deposition solutions. In some cases, surface activation is required t o initiate the autocatalytic process. We will discuss the issues of the see d layer and will present both 'wet' and 'dry' seeding methods. The depositi on of both copper and the barrier layers is very conformal and we assume th at the deposition rate is surface-reaction limited. In addition, we present recent results of the barrier material properties and experimental results of the fully integrated structure with and inlaid-copper technology. (C) 1 999 Elsevier Science Ltd. All rights reserved.