High room temperature peak-to-valley current ratio in Si based Esaki diodes

Authors
Duschl, R Schmidt, OG Reitemann, G Kasper, E Eberl, K
Citation
R. Duschl et al., High room temperature peak-to-valley current ratio in Si based Esaki diodes, ELECTR LETT, 35(13), 1999, pp. 1111-1112
Citations number
6
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
35
Issue
13
Year of publication
1999
Pages
1111 - 1112
Database
ISI
SICI code
0013-5194(19990624)35:13<1111:HRTPCR>2.0.ZU;2-R
Abstract
Room temperature (RT) I-V characteristics of epitaxially group Si/SiGe/Si p (+)/i/n(+) Esaki diodes are presented. The incorporation of Ge within the i ntrinsic (i) zone gives rise to an increased peak current density (j(P) = 3 kA/cm(2)) and peak-to-valley current ratio (PVCR) compared to pure Si struc tures (j(P) = 80A/cm(2)). A detailed investigation and optimisation of post -growth annealing has demonstrated a record PVCR of 4.2 for Si based Esaki diodes.