A low power dissipation technique for a low voltage OTA

This paper proposes a novel low power dissipation technique for a low volta ge OTA. A conventional low power OTA with a class AB input stage is not sui table for a low voltage operation (+/- 1.5 V supply voltages), because it u ses composite transistors (referred to CMOS pair) which has a large thresho ld voltage. On the other hand, the tail-current type OTA needs a large tail -current value to obtain a sufficient input range at the expense of power d issipation. Therefore, the conventional tail-current type OTA has a trade-o ff between the input range and the power dissipation to the tail-current va lue. The trade-off can be eliminated by the proposed technique. The techniq ue exploits negative feedback control including a current amplifier and a m inimum current selecting circuit. The proposed technique was used on Wang's OTA to create another OTA, named Low Power Wang's OTA. Also, SPICE simulat ions are used to verify the efficiency of Low Power Wang's OTA. Although th e static power of Low Power Wang's OTA is 122 mu W, it has a sufficient inp ut range, whereas conventional Wang's OTA needs 703 mu W to obtain a suffic ient input range. However, we can say that as the input signal gets larger, the power of Low Power Wang's OTA becomes larger.