Ultra low-voltage/low-power digital floating-gate circuits

Authors
Berg, Y Wisland, DT Lande, TS
Citation
Y. Berg et al., Ultra low-voltage/low-power digital floating-gate circuits, IEEE CIR-II, 46(7), 1999, pp. 930-936
Citations number
15
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
ISSN journal
10577130 → ACNP
Volume
46
Issue
7
Year of publication
1999
Pages
930 - 936
Database
ISI
SICI code
1057-7130(199907)46:7<930:ULDFC>2.0.ZU;2-R
Abstract
This paper describes a novel techniyue for implementing ultra low-voltage/l ow-power digital circuits. The effective threshold voltage seen from a cont rol gate is adjusted during a UV-light-activated tuning procedure. The opti mal effective threshold voltage matching the supply voltage and speed may b e programmed by UV light through an activated conductance between the power rails and the floating gates. Measured results are provided for gates oper ating down to 0.4-V power supply, using a standard double-poly CMOS process .