High-frequency four noise parameters of silicon-on-insulator-based technology MOSFET for the design of low-noise RF integrated circuits

An exhaustive experimental study of the high-frequency noise properties of MOSFET in silicon-on-insulator (SOI) technology is presented. Various gate geometries are fabricated to study the influence of effective channel lengt h, gate finger width, and gate sheet resistivity on the four noise paramete rs. The high level of MOSFET sensitivity to the minimum noise matching cond ition is demonstrated, From experimental results, optimal ways to realize u ltra low noise amplifiers are discussed. The capability of the fully deplet ed standard SOI CMOS process for realizing low-noise amplifiers for multigi gahertz portable communication systems is shown.