Electrical activity of defects induced by oxygen precipitation in Czochralski-grown silicon wafers

Majority and minority carrier traps introduced in p-type Czochralski-grown silicon (CZ-Si) wafers during two-step low-high temperature annealing proce dures were investigated using deep level transient spectroscopy (DLTS). It was determined that the platelike silicon oxide precipitate surface and the punch-out dislocations introduce majority carrier traps having deep energy levels (E-V + 0.43 eV and E-V + 0.26 eV, repectively) in the Si band gap i n concentrations proportional to the relevant defect density. The minority carrier traps are positioned at E-C - 0.42 eV and E-C - 0.22 eV. The majori ty carrier trap density on the surface of the platelike precipitate was est imated as similar to 3 x 10(9) cm(-2) and the linear trap density for the p unch-out dislocations as similar to 4 x 10(4) cm(-1).