Calculation of slip length in 300 mm silicon wafers during thermal processes

A simulation model to calculate a slip length during thermal processes was reposed on the basis of dislocation kinetics. The dislocation velocity was calculated from gravitational and thermal stresses. The slip length was cal culated by integrating the dislocation velocity by the duration of thermal processes. It was found that the model could predict the slip length, the o ptimum ramping rate, and wafer spacing quantitatively with high accuracy fo r 300 mm wafers. (C) 1999 The Electrochemical Society. All rights reserved.