Using historical wafermap data for automated yield analysis

To be productive and profitable in a modern semiconductor fabrication envir onment, large amounts of manufacturing data must be collected, analyzed, an d maintained. This includes data collected from in- and off-line wafer insp ection systems and from the process equipment itself. This data is increasi ngly being used to design new processes, control and maintain tools, and to provide the information needed for rapid yield learning and prediction. Be cause of increasing device complexity, the amount of data being generated i s outstripping the yield engineer's ability to effectively monitor and corr ect unexpected trends and excursions. The 1997 SIA National Technology Road map for Semiconductors highlights a need to address these issues through "a utomated data reduction algorithms to source defects from multiple data sou rces and to reduce defect sourcing time." SEMATECH and the Oak Ridge Nation al Laboratory have been developing new strategies and technologies for prov iding the yield engineer with higher levels of assisted data reduction for the purpose of automated yield analysis. In this article, we will discuss t he current state of the art and trends in yield management automation. (C) 1999 American Vacuum Society. [S0734-2101(99)04404-8].