A memory device using silicon rich oxide (SRO) as the charge trapping layer
for dynamic or quasi-nonvolatile memory application is proposed, The devic
e achieved write and erase speed at low voltage comparable to that of a dyn
amic-random-access memory (DRAM) cell with a much longer data retention tim
e. This device has a SRO charge trapping layer on top of a very thin tunnel
ing oxide (<2 nm), Using the traps in the SRO layer for charge storage, a s
ymmetrical write/erase characteristics were achieved, This new SRO cell has
an erase time much shorter than values of similar devices reported in the
literature.